// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  hiddrphy_ac_static_reg_reg_offset_field.h
// Project line  :  IP
// Department    :  
// Author        :  Jason, Edward
// Version       :  .1
// Date          :  2011/11/29
// Description   :  The DDR PHY Controller Block
// Others        :  Generated automatically by nManager V4.2 
// History       :  Jason, Edward 2018/03/19 12:28:13 Create file
// ******************************************************************************

#ifndef __HIDDRPHY_AC_STATIC_REG_REG_OFFSET_FIELD_H__
#define __HIDDRPHY_AC_STATIC_REG_REG_OFFSET_FIELD_H__

#define HIDDRPHY_AC_STATIC_REG_JTMT_SEL_LEN                 1
#define HIDDRPHY_AC_STATIC_REG_JTMT_SEL_OFFSET              15
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LOCKIN_LEN         1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LOCKIN_OFFSET      14
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_FOPETESTREF_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_FOPETESTREF_OFFSET 13
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_FOPETESTFB_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_FOPETESTFB_OFFSET  12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LOCKT_SEL_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LOCKT_SEL_OFFSET   11
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_INITSEL_LEN        1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_INITSEL_OFFSET     10
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_EN_CAL_LEN         1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_EN_CAL_OFFSET      9
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_ENPHSEL_LEN        1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_ENPHSEL_OFFSET     8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_BP_REFVCO_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_BP_REFVCO_OFFSET   7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_BP_REFPFD_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_BP_REFPFD_OFFSET   6

#define HIDDRPHY_AC_STATIC_REG_LP_CSOEN_DISABLE_PHY_LEN       1
#define HIDDRPHY_AC_STATIC_REG_LP_CSOEN_DISABLE_PHY_OFFSET    31
#define HIDDRPHY_AC_STATIC_REG_LP_CKOEN_DISABLE_PHY_LEN       1
#define HIDDRPHY_AC_STATIC_REG_LP_CKOEN_DISABLE_PHY_OFFSET    30
#define HIDDRPHY_AC_STATIC_REG_WFIFO_ACCTL_PASSTHROUGH_LEN    1
#define HIDDRPHY_AC_STATIC_REG_WFIFO_ACCTL_PASSTHROUGH_OFFSET 21
#define HIDDRPHY_AC_STATIC_REG_WFIFO_ACCTL_GCKEN_LEN          1
#define HIDDRPHY_AC_STATIC_REG_WFIFO_ACCTL_GCKEN_OFFSET       20
#define HIDDRPHY_AC_STATIC_REG_LPBK_ADDR_V_SEL_LEN            1
#define HIDDRPHY_AC_STATIC_REG_LPBK_ADDR_V_SEL_OFFSET         19
#define HIDDRPHY_AC_STATIC_REG_LPDDR_MODE_LEN                 1
#define HIDDRPHY_AC_STATIC_REG_LPDDR_MODE_OFFSET              18
#define HIDDRPHY_AC_STATIC_REG_ACCTL_RESETOEN_LEN             1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_RESETOEN_OFFSET          17
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CSOEN_LEN                2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CSOEN_OFFSET             15
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKEOEN_LEN               2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKEOEN_OFFSET            13
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKOEN_LEN                1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKOEN_OFFSET             12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CMDOEN_LEN               8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CMDOEN_OFFSET            2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_ODTOEN_LEN               1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_ODTOEN_OFFSET            0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_PE_LEN           1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_PE_OFFSET        31
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_HS_LEN           1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_HS_OFFSET        30
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_ODTEN_LEN         6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_ODTEN_OFFSET      24
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_VREF_SEL_LEN      6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_VREF_SEL_OFFSET   18
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_PUPDEN_LEN          1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_PUPDEN_OFFSET       17
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_ODTEN_LEN           1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_ODTEN_OFFSET        16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_PD_LEN              1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_PD_OFFSET           15
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_RSTB_LEN            1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_RSTB_OFFSET         14
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_PDRV_LEN         6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_PDRV_OFFSET      8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_NDRV_LEN         6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_NDRV_OFFSET      2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_ACIOPLDN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_ACIOPLDN_OFFSET  1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_DIFFCK_EN_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_DIFFCK_EN_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_PDRV_BIT6_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_PDRV_BIT6_OFFSET    28
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LT_LEN                2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LT_OFFSET             26
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_SP_LEN                2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_SP_OFFSET             23
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_CPI_LEN               3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_CPI_OFFSET            20
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_INIT_LEN              1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_INIT_OFFSET           19
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_TESTEN_LEN            1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_TESTEN_OFFSET         18
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_EN_DBG_LEN            1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_EN_DBG_OFFSET         17
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_CPISEL_LEN            1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_CPISEL_OFFSET         16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_CPIBEFORE_SEL_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_CPIBEFORE_SEL_OFFSET  15
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_DELAY_SEL_LEN         1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_DELAY_SEL_OFFSET      14
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_TESTEN_ODRAIN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_TESTEN_ODRAIN_OFFSET  13
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_FBTEST_LEN            1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_FBTEST_OFFSET         12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_ENLV_PI_LEN           1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_ENLV_PI_OFFSET        11
#define HIDDRPHY_AC_STATIC_REG_PLL_CLK_GATED_HW_DISABLE_LEN    11
#define HIDDRPHY_AC_STATIC_REG_PLL_CLK_GATED_HW_DISABLE_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LOCK_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_LOCK_OFFSET 31
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_TEST_LEN    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PLL_TEST_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_REG_LP4DQOE_EXT1TDIS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_LP4DQOE_EXT1TDIS_OFFSET    31
#define HIDDRPHY_AC_STATIC_REG_REG_L_DQ_DUTYCAL_LEN           1
#define HIDDRPHY_AC_STATIC_REG_REG_L_DQ_DUTYCAL_OFFSET        30
#define HIDDRPHY_AC_STATIC_REG_REG_H_DQ_DUTYCAL_LEN           1
#define HIDDRPHY_AC_STATIC_REG_REG_H_DQ_DUTYCAL_OFFSET        29
#define HIDDRPHY_AC_STATIC_REG_REG_L_DQS_DUTYCAL_LEN          1
#define HIDDRPHY_AC_STATIC_REG_REG_L_DQS_DUTYCAL_OFFSET       28
#define HIDDRPHY_AC_STATIC_REG_REG_H_DQS_DUTYCAL_LEN          1
#define HIDDRPHY_AC_STATIC_REG_REG_H_DQS_DUTYCAL_OFFSET       27
#define HIDDRPHY_AC_STATIC_REG_REG_GDS_DLY05T_SEL_1_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_GDS_DLY05T_SEL_1_OFFSET    26
#define HIDDRPHY_AC_STATIC_REG_REG_GDS_DLY05T_SEL_0_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_GDS_DLY05T_SEL_0_OFFSET    25
#define HIDDRPHY_AC_STATIC_REG_REG_DQSGTOG_RESET_GATED_LEN    1
#define HIDDRPHY_AC_STATIC_REG_REG_DQSGTOG_RESET_GATED_OFFSET 22
#define HIDDRPHY_AC_STATIC_REG_REG_DQSG_DYNPHASE_EN_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_DQSG_DYNPHASE_EN_OFFSET    21
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_EXT2TDIS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_EXT2TDIS_OFFSET    20
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_EXT1TDIS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_EXT1TDIS_OFFSET    19
#define HIDDRPHY_AC_STATIC_REG_REG_DQOE_EXTEND_2T_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_DQOE_EXTEND_2T_OFFSET      18
#define HIDDRPHY_AC_STATIC_REG_REG_DQOE_EXTEND_1T_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_DQOE_EXTEND_1T_OFFSET      17
#define HIDDRPHY_AC_STATIC_REG_REG_4X_SEL_LEN                 1
#define HIDDRPHY_AC_STATIC_REG_REG_4X_SEL_OFFSET              16
#define HIDDRPHY_AC_STATIC_REG_REG_4XPLL_GATED_LEN            1
#define HIDDRPHY_AC_STATIC_REG_REG_4XPLL_GATED_OFFSET         15
#define HIDDRPHY_AC_STATIC_REG_REG_CMDLP_EN_LEN               1
#define HIDDRPHY_AC_STATIC_REG_REG_CMDLP_EN_OFFSET            14
#define HIDDRPHY_AC_STATIC_REG_REG_CKOUT_GATED_LEN            13
#define HIDDRPHY_AC_STATIC_REG_REG_CKOUT_GATED_OFFSET         1
#define HIDDRPHY_AC_STATIC_REG_REG_4XMODE_EN_LEN              1
#define HIDDRPHY_AC_STATIC_REG_REG_4XMODE_EN_OFFSET           0

#define HIDDRPHY_AC_STATIC_REG_VREF_LPBKMODE1_LEN    2
#define HIDDRPHY_AC_STATIC_REG_VREF_LPBKMODE1_OFFSET 30
#define HIDDRPHY_AC_STATIC_REG_VREF_LPBKMODE0_LEN    2
#define HIDDRPHY_AC_STATIC_REG_VREF_LPBKMODE0_OFFSET 28

#define HIDDRPHY_AC_STATIC_REG_ACCTL_PHAZMETER_STATUS_LEN    16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PHAZMETER_STATUS_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PHAZMETER_IN_LEN        16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PHAZMETER_IN_OFFSET     0

#define HIDDRPHY_AC_STATIC_REG_REG_GATEDERR_CHK_DIS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_GATEDERR_CHK_DIS_OFFSET    31
#define HIDDRPHY_AC_STATIC_REG_REG_GATEDLA_PASTHR_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_GATEDLA_PASTHR_OFFSET      30
#define HIDDRPHY_AC_STATIC_REG_REG_DUTYCAL_NOTHRPAD_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_DUTYCAL_NOTHRPAD_OFFSET    29
#define HIDDRPHY_AC_STATIC_REG_REG_DUTYCAL_EN_LEN             1
#define HIDDRPHY_AC_STATIC_REG_REG_DUTYCAL_EN_OFFSET          28
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_R05TDIS_LEN        1
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_R05TDIS_OFFSET     27
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_R1TDIS_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_DQOEMON_R1TDIS_OFFSET      26
#define HIDDRPHY_AC_STATIC_REG_REG_DMDLY_PRI_EN_LEN           1
#define HIDDRPHY_AC_STATIC_REG_REG_DMDLY_PRI_EN_OFFSET        25
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_SQUEACH_DISABLE_LEN    1
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_SQUEACH_DISABLE_OFFSET 24
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_GTERROR_EN_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_GTERROR_EN_OFFSET      23
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_DYNTRACK_DIS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_DYNTRACK_DIS_OFFSET    22
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_DQSDLY_SEL_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_DQSDLY_SEL_OFFSET      21
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_DLYMEAS_DIS_LEN        1
#define HIDDRPHY_AC_STATIC_REG_REG_DBG_DLYMEAS_DIS_OFFSET     20
#define HIDDRPHY_AC_STATIC_REG_REG_WREN_2TGAP_EN_LEN          1
#define HIDDRPHY_AC_STATIC_REG_REG_WREN_2TGAP_EN_OFFSET       19
#define HIDDRPHY_AC_STATIC_REG_REG_TX_DQSG_DCC_V_LEN          7
#define HIDDRPHY_AC_STATIC_REG_REG_TX_DQSG_DCC_V_OFFSET       12
#define HIDDRPHY_AC_STATIC_REG_REG_TX_DQSG_DCC_H_LEN          7
#define HIDDRPHY_AC_STATIC_REG_REG_TX_DQSG_DCC_H_OFFSET       5
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_OFFSET_MEASH_V_LEN     1
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_OFFSET_MEASH_V_OFFSET  4
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_OFFSET_MEASH_H_LEN     1
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_OFFSET_MEASH_H_OFFSET  3
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_2SAMPLE_SEL_LEN        1
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_2SAMPLE_SEL_OFFSET     2
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_1SAMPLE_SEL_LEN        1
#define HIDDRPHY_AC_STATIC_REG_REG_TDC_1SAMPLE_SEL_OFFSET     1
#define HIDDRPHY_AC_STATIC_REG_REG_RDEN_2TGAP_EN_LEN          1
#define HIDDRPHY_AC_STATIC_REG_REG_RDEN_2TGAP_EN_OFFSET       0

#define HIDDRPHY_AC_STATIC_REG_REG_DUTYCAL_2XFALL_EN_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_DUTYCAL_2XFALL_EN_OFFSET      28
#define HIDDRPHY_AC_STATIC_REG_REG_REF4X_DRAMCLKCAL_BDL_LEN      8
#define HIDDRPHY_AC_STATIC_REG_REG_REF4X_DRAMCLKCAL_BDL_OFFSET   20
#define HIDDRPHY_AC_STATIC_REG_REG_PLLPTR_SYNC_EN_LEN            1
#define HIDDRPHY_AC_STATIC_REG_REG_PLLPTR_SYNC_EN_OFFSET         19
#define HIDDRPHY_AC_STATIC_REG_REG_DQSGCON_ERR_EN_LEN            1
#define HIDDRPHY_AC_STATIC_REG_REG_DQSGCON_ERR_EN_OFFSET         16
#define HIDDRPHY_AC_STATIC_REG_REG_WRRANKSEL_EN_LEN              1
#define HIDDRPHY_AC_STATIC_REG_REG_WRRANKSEL_EN_OFFSET           15
#define HIDDRPHY_AC_STATIC_REG_REG_WPRE3T_EN_LEN                 1
#define HIDDRPHY_AC_STATIC_REG_REG_WPRE3T_EN_OFFSET              14
#define HIDDRPHY_AC_STATIC_REG_REG_RXPPFIFO_EN_LEN               1
#define HIDDRPHY_AC_STATIC_REG_REG_RXPPFIFO_EN_OFFSET            13
#define HIDDRPHY_AC_STATIC_REG_REG_RXFIFO_7TEN_EN_LEN            1
#define HIDDRPHY_AC_STATIC_REG_REG_RXFIFO_7TEN_EN_OFFSET         12
#define HIDDRPHY_AC_STATIC_REG_REG_READ_DUTYRESULT_LEN           1
#define HIDDRPHY_AC_STATIC_REG_REG_READ_DUTYRESULT_OFFSET        11
#define HIDDRPHY_AC_STATIC_REG_REG_READ_DRAMCLK_DUTY_LEN         1
#define HIDDRPHY_AC_STATIC_REG_REG_READ_DRAMCLK_DUTY_OFFSET      10
#define HIDDRPHY_AC_STATIC_REG_REG_RDRANKSEL_FROM_RANKCTL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_REG_RDRANKSEL_FROM_RANKCTL_OFFSET 9
#define HIDDRPHY_AC_STATIC_REG_REG_RDRANKSEL_EXT1TDIS_LEN        1
#define HIDDRPHY_AC_STATIC_REG_REG_RDRANKSEL_EXT1TDIS_OFFSET     8
#define HIDDRPHY_AC_STATIC_REG_REG_RDRANKSEL_EN_LEN              1
#define HIDDRPHY_AC_STATIC_REG_REG_RDRANKSEL_EN_OFFSET           7
#define HIDDRPHY_AC_STATIC_REG_REG_PERBIT_DYNTRACK_EN_LEN        1
#define HIDDRPHY_AC_STATIC_REG_REG_PERBIT_DYNTRACK_EN_OFFSET     6
#define HIDDRPHY_AC_STATIC_REG_REG_PERBIT_PN_TRACK_EN_LEN        1
#define HIDDRPHY_AC_STATIC_REG_REG_PERBIT_PN_TRACK_EN_OFFSET     5
#define HIDDRPHY_AC_STATIC_REG_REG_PASSCTL_EN_LEN                1
#define HIDDRPHY_AC_STATIC_REG_REG_PASSCTL_EN_OFFSET             4
#define HIDDRPHY_AC_STATIC_REG_REG_OVLAT_GATED_N_LEN             1
#define HIDDRPHY_AC_STATIC_REG_REG_OVLAT_GATED_N_OFFSET          3
#define HIDDRPHY_AC_STATIC_REG_REG_OVDFF_GATED_N_LEN             1
#define HIDDRPHY_AC_STATIC_REG_REG_OVDFF_GATED_N_OFFSET          2
#define HIDDRPHY_AC_STATIC_REG_REG_MATCHDQ_DIS_LEN               1
#define HIDDRPHY_AC_STATIC_REG_REG_MATCHDQ_DIS_OFFSET            1
#define HIDDRPHY_AC_STATIC_REG_REG_HSOS_EN_LEN                   1
#define HIDDRPHY_AC_STATIC_REG_REG_HSOS_EN_OFFSET                0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_ODT1_BDL_LEN    7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_ODT1_BDL_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_ODT_BDL_LEN     8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_ODT_BDL_OFFSET  0

#define HIDDRPHY_AC_STATIC_REG_REG_TX_DRAMCLK_DCC_LEN    7
#define HIDDRPHY_AC_STATIC_REG_REG_TX_DRAMCLK_DCC_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKE1_BDL_LEN    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKE1_BDL_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKE_BDL_LEN     8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CKE_BDL_OFFSET  0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_FBCLK_BDL_LEN       5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_FBCLK_BDL_OFFSET    24
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REFCLK_BDL_LEN      5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REFCLK_BDL_OFFSET   16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK1_BDL_LEN    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK1_BDL_OFFSET 8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK0_BDL_LEN    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK0_BDL_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_SYNC_PPFIFO_PTR_LEN            1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SYNC_PPFIFO_PTR_OFFSET         31
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PPFIFO_PTR_EN_LEN              1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_PPFIFO_PTR_EN_OFFSET           30
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_SEL_POS_RX_LEN             1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_SEL_POS_RX_OFFSET          29
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_RESET_PIN_SYNC_MODE_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_RESET_PIN_SYNC_MODE_OFFSET 28
#define HIDDRPHY_AC_STATIC_REG_ACCTL_BYP_CK90_CMD_CODE_LEN          20
#define HIDDRPHY_AC_STATIC_REG_ACCTL_BYP_CK90_CMD_CODE_OFFSET       8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_BYP_CLK_GATED_DIS_LEN          1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_BYP_CLK_GATED_DIS_OFFSET       7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_BUFPHYCLK_DIV2_LEN             1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_BUFPHYCLK_DIV2_OFFSET          6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_LVDQCLKDIV2_LEN                1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_LVDQCLKDIV2_OFFSET             5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK_L_LEN                  1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK_L_OFFSET               4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK_H_LEN                  1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAMCLK_H_OFFSET               3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_RX_PPFIFO_PTR_EN_LEN           1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_RX_PPFIFO_PTR_EN_OFFSET        2

#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_ADDR_LEN     16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_ADDR_OFFSET  16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_BA_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_BA_OFFSET    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_WE_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_WE_OFFSET    6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CAS_OFFSET   5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_RAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_RAS_OFFSET   4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_ODT_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_ODT_OFFSET   3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CKE_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CKE_OFFSET   2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CS_OFFSET    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_RESET_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_RESET_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_ADDR_LEN     16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_ADDR_OFFSET  16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_BA_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_BA_OFFSET    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_WE_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_WE_OFFSET    6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CAS_OFFSET   5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_RAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_RAS_OFFSET   4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_ODT_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_ODT_OFFSET   3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CKE_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CKE_OFFSET   2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CS_OFFSET    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_RESET_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_RESET_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_ADDR_LEN     16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_ADDR_OFFSET  16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_BA_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_BA_OFFSET    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_WE_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_WE_OFFSET    6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CAS_OFFSET   5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_RAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_RAS_OFFSET   4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_ODT_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_ODT_OFFSET   3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CKE_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CKE_OFFSET   2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CS_OFFSET    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_RESET_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_RESET_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_ADDR_LEN     16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_ADDR_OFFSET  16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_BA_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_BA_OFFSET    8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_WE_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_WE_OFFSET    6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CAS_OFFSET   5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_RAS_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_RAS_OFFSET   4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_ODT_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_ODT_OFFSET   3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CKE_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CKE_OFFSET   2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CS_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CS_OFFSET    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_RESET_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_RESET_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_MCLK_LEN        3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_MCLK_OFFSET     20
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD1T_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD1T_OFFSET    16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD2T_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD2T_OFFSET    12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK1_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK0_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK0_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_MCLK_LEN        3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_MCLK_OFFSET     20
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD1T_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD1T_OFFSET    16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD2T_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD2T_OFFSET    12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK1_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK0_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK0_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_CMD1T2T_SEL_LEN             2
#define HIDDRPHY_AC_STATIC_REG_CMD1T2T_SEL_OFFSET          26
#define HIDDRPHY_AC_STATIC_REG_ACCTL_HALFT_DRAMCLK0_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_HALFT_DRAMCLK0_OFFSET 25
#define HIDDRPHY_AC_STATIC_REG_ACCTL_HALFT_DRAMCLK1_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_HALFT_DRAMCLK1_OFFSET 24
#define HIDDRPHY_AC_STATIC_REG_ACCTL_HALFT_CMD1T_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_HALFT_CMD1T_OFFSET    23
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK3P_CMD1T_LEN        3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK3P_CMD1T_OFFSET     12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK2P_DCLK1_LEN        3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK2P_DCLK1_OFFSET     9
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK1P_DCLK0_LEN        3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK1P_DCLK0_OFFSET     6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK0P_MCLK_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK0P_MCLK_OFFSET      3

#define HIDDRPHY_AC_STATIC_REG_ACDBG_CONFIG_LEN                   4
#define HIDDRPHY_AC_STATIC_REG_ACDBG_CONFIG_OFFSET                16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DESKEW_REGREAD_LEN           1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DESKEW_REGREAD_OFFSET        8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_EVNTMT_RESULT_DRAMCLK_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_EVNTMT_RESULT_DRAMCLK_OFFSET 7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_EVNTMT_DONE_DRAMCLK_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_EVNTMT_DONE_DRAMCLK_OFFSET   6
#define HIDDRPHY_AC_STATIC_REG_ACDBG_RDCNT_LEN                    6
#define HIDDRPHY_AC_STATIC_REG_ACDBG_RDCNT_OFFSET                 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_RSVDCTRL_LEN    32
#define HIDDRPHY_AC_STATIC_REG_ACCTL_RSVDCTRL_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_RSVDSTATUS_LEN    32
#define HIDDRPHY_AC_STATIC_REG_ACCTL_RSVDSTATUS_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_MCLK_DCC_BYT1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_MCLK_DCC_BYT1_OFFSET 28
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS0_DCC_BYT1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS0_DCC_BYT1_OFFSET 25
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS1_DCC_BYT1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS1_DCC_BYT1_OFFSET 22
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ0_DCC_BYT1_LEN     3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ0_DCC_BYT1_OFFSET  19
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ1_DCC_BYT1_LEN     3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ1_DCC_BYT1_OFFSET  16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_MCLK_DCC_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_MCLK_DCC_OFFSET      12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS0_DCC_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS0_DCC_OFFSET      9
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS1_DCC_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQS1_DCC_OFFSET      6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ0_DCC_LEN          3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ0_DCC_OFFSET       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ1_DCC_LEN          3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DQ1_DCC_OFFSET       0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_ODT1_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_ODT1_OFFSET 11
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CKE1_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CKE1_OFFSET 10
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CS1_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_TIMING2T_CS1_OFFSET  9
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_ODT1_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_ODT1_OFFSET 8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CKE1_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CKE1_OFFSET 7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CS1_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_DRAM1SEL_CS1_OFFSET  6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_ODT1_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_ODT1_OFFSET  5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CKE1_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CKE1_OFFSET  4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CS1_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_POSEDGE_CS1_OFFSET   3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_ODT1_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_ODT1_OFFSET   2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CKE1_LEN      1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CKE1_OFFSET   1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CS1_LEN       1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_SDRSEL_CS1_OFFSET    0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_MCLK_BYT1_LEN        3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_MCLK_BYT1_OFFSET     28
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD1T_BYT1_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD1T_BYT1_OFFSET    25
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD2T_BYT1_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_CMD2T_BYT1_OFFSET    22
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK1_BYT1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK1_BYT1_OFFSET 19
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK0_BYT1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK2X_DRAMCLK0_BYT1_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_MCLK_BYT1_LEN        3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_MCLK_BYT1_OFFSET     12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD1T_BYT1_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD1T_BYT1_OFFSET    9
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD2T_BYT1_LEN       3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_CMD2T_BYT1_OFFSET    6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK1_BYT1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK1_BYT1_OFFSET 3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK0_BYT1_LEN    3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CLK1X_DRAMCLK0_BYT1_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_CMD_BYT1_PHSEL_LEN      4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_CMD_BYT1_PHSEL_OFFSET   24
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_BYONE_CMDR1T_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_BYONE_CMDR1T_SEL_OFFSET 23
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK4P_CMD2T_BYT1_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK4P_CMD2T_BYT1_OFFSET      9
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK3P_CMD1T_BYT1_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK3P_CMD1T_BYT1_OFFSET      6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK2P_DCLK1_BYT1_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK2P_DCLK1_BYT1_OFFSET      3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK1P_DCLK0_BYT1_LEN         3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_CK1P_DCLK0_BYT1_OFFSET      0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_RX_MODE1_LEN         1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_RX_MODE1_OFFSET      25
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_RX_MODE0_LEN         1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CK_RX_MODE0_OFFSET      24
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_RX_MODE1_LEN         2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_RX_MODE1_OFFSET      22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_RX_MODE0_LEN         2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_RX_MODE0_OFFSET      20
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_ZQ_RX_MODE_LEN    2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_ZQ_RX_MODE_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_VREF_SEL_LEN         2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_VREF_SEL_OFFSET      4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_ODTEN_LEN            2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CS_ODTEN_OFFSET         0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ0_DCC_H_LEN     7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ0_DCC_H_OFFSET  21
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ0_DCC_V_LEN     7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ0_DCC_V_OFFSET  14
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_MCLK_DCC_H_LEN    7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_MCLK_DCC_H_OFFSET 7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_MCLK_DCC_V_LEN    7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_MCLK_DCC_V_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ1_DCC_H_LEN     7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ1_DCC_H_OFFSET  14
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ1_DCC_V_LEN     7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQ1_DCC_V_OFFSET  7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQS0_DCC_H_LEN    7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_REG_DQS0_DCC_H_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_RX_MODE1_LEN    6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_RX_MODE1_OFFSET 22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_RX_MODE0_LEN    6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ADDR_RX_MODE0_OFFSET 16

#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODTSEL_LEN                    3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODTSEL_OFFSET                 26
#define HIDDRPHY_AC_STATIC_REG_DUMMY_IOCTL_ODTSEL_LEN              3
#define HIDDRPHY_AC_STATIC_REG_DUMMY_IOCTL_ODTSEL_OFFSET           23
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_3_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_3_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_3_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_3_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD0_LEN         4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD0_OFFSET      28
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD1_LEN         4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD1_OFFSET      24
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_0_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_0_OFFSET 20
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_0_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_0_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_1_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_1_OFFSET 12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_1_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_1_OFFSET 8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_2_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_2_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_2_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_2_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_0_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_0_OFFSET 20
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_0_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_0_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_1_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_1_OFFSET 12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_1_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_1_OFFSET 8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_2_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_2_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_2_LEN    4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_2_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODT_RONSELN_LEN     3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODT_RONSELN_OFFSET  27
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODT_RONSELP_LEN     3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODT_RONSELP_OFFSET  24
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RONSELN_LEN    3
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RONSELN_OFFSET 21
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RONSELP_LEN    3
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RONSELP_OFFSET 18
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RONSELN_LEN    3
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RONSELN_OFFSET 15
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RONSELP_LEN    3
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RONSELP_OFFSET 12
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONSELN_LEN      3
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONSELN_OFFSET   9
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONSELP_LEN      3
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONSELP_OFFSET   6
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONBSELP_LEN     3
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONBSELP_OFFSET  3
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONBSELN_LEN     3
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RONBSELN_OFFSET  0

#define HIDDRPHY_AC_STATIC_REG_DUMMY_IOCTL_PRE_EM_LEN     2
#define HIDDRPHY_AC_STATIC_REG_DUMMY_IOCTL_PRE_EM_OFFSET  20
#define HIDDRPHY_AC_STATIC_REG_DUMMY_IOCTL_LP4X_EN_LEN    2
#define HIDDRPHY_AC_STATIC_REG_DUMMY_IOCTL_LP4X_EN_OFFSET 18
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CKE_RONSELP_LEN      3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CKE_RONSELP_OFFSET   15
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CKE_RONSELN_LEN      3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CKE_RONSELN_OFFSET   12
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_PRE_EM_LEN        2
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_PRE_EM_OFFSET     10
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_LP4X_EN_LEN       2
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_LP4X_EN_OFFSET    8
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_PRE_EM_LEN      2
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_PRE_EM_OFFSET   6
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_LP4X_EN_LEN     2
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_LP4X_EN_OFFSET  4
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_PRE_EM_LEN      2
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_PRE_EM_OFFSET   2
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_LP4X_EN_LEN     2
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_LP4X_EN_OFFSET  0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_CKE_RX_MODE_LEN         2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_CKE_RX_MODE_OFFSET      19
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODT_RX_MODE_LEN         1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_ODT_RX_MODE_OFFSET      18
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_TX_DUTY_EN_LEN       1
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_TX_DUTY_EN_OFFSET    17
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_TX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_TX_DUTY_EN_OFFSET  16
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_TX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_TX_DUTY_EN_OFFSET  15
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_TX_DUTY_INC_LEN      1
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_TX_DUTY_INC_OFFSET   14
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_TX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_TX_DUTY_INC_OFFSET 13
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_TX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_TX_DUTY_INC_OFFSET 12
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_TX_DUTY_SEL_LEN      1
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_TX_DUTY_SEL_OFFSET   11
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_TX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_TX_DUTY_SEL_OFFSET 10
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_TX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_TX_DUTY_SEL_OFFSET 9
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RX_DUTY_EN_LEN       1
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RX_DUTY_EN_OFFSET    8
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RX_DUTY_EN_OFFSET  7
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RX_DUTY_EN_OFFSET  6
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RX_DUTY_INC_LEN      1
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RX_DUTY_INC_OFFSET   5
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RX_DUTY_INC_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RX_DUTY_INC_OFFSET 3
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RX_DUTY_SEL_LEN      1
#define HIDDRPHY_AC_STATIC_REG_CK_IOCTL_RX_DUTY_SEL_OFFSET   2
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC2T_IOCTL_RX_DUTY_SEL_OFFSET 1
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC1T_IOCTL_RX_DUTY_SEL_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_PLDN_LEN       1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_PLDN_OFFSET    7
#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_MODE_LEN       1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_MODE_OFFSET    6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_RONSELN_LEN    3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_RONSELN_OFFSET 3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_RONSELP_LEN    3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_RESET_RONSELP_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_VREF_SEL_LEN       1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_VREF_SEL_OFFSET    25
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_ODTEN_LEN          1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_ODTEN_OFFSET       24
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_IE_LEN             1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_IE_OFFSET          23
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_E_LEN              1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_E_OFFSET           22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_PLDN_LEN           1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_PLDN_OFFSET        21
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_MODE0_LEN          1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_MODE0_OFFSET       20
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_MODE1_LEN          1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_MODE1_OFFSET       19
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_TX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_TX_DUTY_EN_OFFSET  18
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_TX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_TX_DUTY_INC_OFFSET 17
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_TX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_TX_DUTY_SEL_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RX_DUTY_EN_OFFSET  15
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RX_DUTY_INC_OFFSET 14
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RX_DUTY_SEL_OFFSET 13
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_ODTSEL_LEN         3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_ODTSEL_OFFSET      10
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RONSELN_LEN        3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RONSELN_OFFSET     7
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RONSELP_LEN        3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_RONSELP_OFFSET     4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_PRE_P_LEN          2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_PRE_P_OFFSET       2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_PRE_N_LEN          2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_PRE_N_OFFSET       0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PUPDEN_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PUPDEN_OFFSET 8
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_IE_LEN        1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_IE_OFFSET     7
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_ODTEN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_ODTEN_OFFSET  6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RSTB_LEN      1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RSTB_OFFSET   5
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PD_LEN        1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PD_OFFSET     4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_DIFF_LEN      1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_DIFF_OFFSET   3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_E_LEN         1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_E_OFFSET      2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_MODE0_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_MODE0_OFFSET  1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_MODE1_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_MODE1_OFFSET  0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_PDRV_DEBUG_BIT6_LEN         1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_PDRV_DEBUG_BIT6_OFFSET      25
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONBSELP_LEN       3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONBSELP_OFFSET    22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONBSELN_LEN       3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONBSELN_OFFSET    19
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_TX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_TX_DUTY_EN_OFFSET  18
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_TX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_TX_DUTY_INC_OFFSET 17
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_TX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_TX_DUTY_SEL_OFFSET 16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RX_DUTY_EN_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RX_DUTY_EN_OFFSET  15
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RX_DUTY_INC_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RX_DUTY_INC_OFFSET 14
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RX_DUTY_SEL_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RX_DUTY_SEL_OFFSET 13
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_ODTSEL_LEN         3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_ODTSEL_OFFSET      10
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONSELN_LEN        3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONSELN_OFFSET     7
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONSELP_LEN        3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_RONSELP_OFFSET     4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PRE_P_LEN          2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PRE_P_OFFSET       2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PRE_N_LEN          2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_PRE_N_OFFSET       0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_PE_DEBUG_LEN                1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_PE_DEBUG_OFFSET             31
#define HIDDRPHY_AC_STATIC_REG_IOCTL_HS_DEBUG_LEN                1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_HS_DEBUG_OFFSET             30
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE0_DEBUG_LEN        1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE0_DEBUG_OFFSET     29
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE1_DEBUG_LEN        1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE1_DEBUG_OFFSET     28
#define HIDDRPHY_AC_STATIC_REG_IOCTL_PDRV_DEBUG_LEN              6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_PDRV_DEBUG_OFFSET           22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_NDRV_DEBUG_LEN              6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_NDRV_DEBUG_OFFSET           16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_3_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_3_DEBUG_OFFSET  15
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_3_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_3_DEBUG_OFFSET  14
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_PD0_DEBUG_LEN          1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_PD0_DEBUG_OFFSET       13
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_PD1_DEBUG_LEN          1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_PD1_DEBUG_OFFSET       12
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_0_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_0_DEBUG_OFFSET  11
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_0_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_0_DEBUG_OFFSET  10
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_1_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_1_DEBUG_OFFSET  9
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_1_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_1_DEBUG_OFFSET  8
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_2_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE0_2_DEBUG_OFFSET  7
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_2_DEBUG_LEN     1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_RANGE1_2_DEBUG_OFFSET  6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL0_0_DEBUG_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL0_0_DEBUG_OFFSET 5
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL1_0_DEBUG_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL1_0_DEBUG_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL0_1_DEBUG_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL0_1_DEBUG_OFFSET 3
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL1_1_DEBUG_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL1_1_DEBUG_OFFSET 2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL0_2_DEBUG_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL0_2_DEBUG_OFFSET 1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL1_2_DEBUG_LEN    1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_REFSEL1_2_DEBUG_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_LP4X_EN_LEN        1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_LP4X_EN_OFFSET     31
#define HIDDRPHY_AC_STATIC_REG_REG_DBGMODE1_SEL_LEN              5
#define HIDDRPHY_AC_STATIC_REG_REG_DBGMODE1_SEL_OFFSET           26
#define HIDDRPHY_AC_STATIC_REG_REG_DBGMODE2_SEL_LEN              5
#define HIDDRPHY_AC_STATIC_REG_REG_DBGMODE2_SEL_OFFSET           21
#define HIDDRPHY_AC_STATIC_REG_REG_DBGMODE3_SEL_LEN              5
#define HIDDRPHY_AC_STATIC_REG_REG_DBGMODE3_SEL_OFFSET           16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TO_LEN        2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TO_OFFSET     14
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TI_LEN        2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TI_OFFSET     12
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TE_LEN        2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TE_OFFSET     10
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_NE_LEN        2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_NE_OFFSET     8
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_IETEST_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_IETEST_OFFSET 6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_IOTEST_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_IOTEST_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_E_LEN         2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_E_OFFSET      2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_HS_LEN        2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_HS_OFFSET     0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_LP4X_EN_LEN        2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_LP4X_EN_OFFSET     30
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_IE_LEN             2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_IE_OFFSET          28
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TIE_LEN            2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TIE_OFFSET         26
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTTEST_LEN        2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTTEST_OFFSET     24
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTEN_LEN          2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTEN_OFFSET       22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TODTEN_LEN         2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TODTEN_OFFSET      20
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PLDN_LEN           2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PLDN_OFFSET        18
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_VREF_SEL_LEN       2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_VREF_SEL_OFFSET    16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TX_DUTY_EN_LEN     2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TX_DUTY_EN_OFFSET  14
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TX_DUTY_INC_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TX_DUTY_INC_OFFSET 12
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TX_DUTY_SEL_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_TX_DUTY_SEL_OFFSET 10
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RX_DUTY_EN_LEN     2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RX_DUTY_EN_OFFSET  8
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RX_DUTY_INC_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RX_DUTY_INC_OFFSET 6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RX_DUTY_SEL_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RX_DUTY_SEL_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_MODE1_LEN          2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_MODE1_OFFSET       2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_MODE0_LEN          2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_MODE0_OFFSET       0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_LP4X_EN_LEN          1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGDIO_LP4X_EN_OFFSET       26
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTSEL2_LEN     2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTSEL2_OFFSET  24
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTSEL1_LEN     2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTSEL1_OFFSET  22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTSEL0_LEN     2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_ODTSEL0_OFFSET  20
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_N1_LEN      2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_N1_OFFSET   18
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_N0_LEN      2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_N0_OFFSET   16
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_P1_LEN      2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_P1_OFFSET   14
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_P0_LEN      2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_PRE_P0_OFFSET   12
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELN2_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELN2_OFFSET 10
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELP2_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELP2_OFFSET 8
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELN0_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELN0_OFFSET 6
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELP0_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELP0_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELN1_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELN1_OFFSET 2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELP1_LEN    2
#define HIDDRPHY_AC_STATIC_REG_IOCTL_DEBUGSIO_K3V7_RONSELP1_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_BYP_CK90_LATCH_EN_LEN    1
#define HIDDRPHY_AC_STATIC_REG_BYP_CK90_LATCH_EN_OFFSET 1
#define HIDDRPHY_AC_STATIC_REG_BYP_CK90_SEL_LEN         1
#define HIDDRPHY_AC_STATIC_REG_BYP_CK90_SEL_OFFSET      0

#define HIDDRPHY_AC_STATIC_REG_BDL_SW_RST_LEN    1
#define HIDDRPHY_AC_STATIC_REG_BDL_SW_RST_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_AC1T_HALF_PHASE_SEL_BYT1_LEN    1
#define HIDDRPHY_AC_STATIC_REG_AC1T_HALF_PHASE_SEL_BYT1_OFFSET 3
#define HIDDRPHY_AC_STATIC_REG_AC1T_HALF_PHASE_SEL_LEN         1
#define HIDDRPHY_AC_STATIC_REG_AC1T_HALF_PHASE_SEL_OFFSET      2
#define HIDDRPHY_AC_STATIC_REG_AC_HALF_PHASE_SEL_BYT1_LEN      1
#define HIDDRPHY_AC_STATIC_REG_AC_HALF_PHASE_SEL_BYT1_OFFSET   1
#define HIDDRPHY_AC_STATIC_REG_AC_HALF_PHASE_SEL_LEN           1
#define HIDDRPHY_AC_STATIC_REG_AC_HALF_PHASE_SEL_OFFSET        0

#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE0_LEN                      4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE0_OFFSET                   22
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE1_LEN                      4
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE1_OFFSET                   18
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE0_TEST_LEN                 1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE0_TEST_OFFSET              17
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE1_TEST_LEN                 1
#define HIDDRPHY_AC_STATIC_REG_IOCTL_VREF_MODE1_TEST_OFFSET              16
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD0_TEST_LEN          1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD0_TEST_OFFSET       15
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD1_TEST_LEN          1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_PD1_TEST_OFFSET       14
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_0_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_0_TEST_OFFSET  13
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_0_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_0_TEST_OFFSET  12
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_1_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_1_TEST_OFFSET  11
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_1_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_1_TEST_OFFSET  10
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_2_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_2_TEST_OFFSET  9
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_2_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_2_TEST_OFFSET  8
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_3_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE0_3_TEST_OFFSET  7
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_3_TEST_LEN     1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_RANGE1_3_TEST_OFFSET  6
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_0_TEST_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_0_TEST_OFFSET 5
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_0_TEST_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_0_TEST_OFFSET 4
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_1_TEST_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_1_TEST_OFFSET 3
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_1_TEST_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_1_TEST_OFFSET 2
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_2_TEST_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL0_2_TEST_OFFSET 1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_2_TEST_LEN    1
#define HIDDRPHY_AC_STATIC_REG_ACCTL_IOCTL_GENVREF_REFSEL1_2_TEST_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACRSVDREG1_LEN    32
#define HIDDRPHY_AC_STATIC_REG_ACRSVDREG1_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_ACRSVDREG2_LEN    32
#define HIDDRPHY_AC_STATIC_REG_ACRSVDREG2_OFFSET 0

#define HIDDRPHY_AC_STATIC_REG_DLYLINE_GATE_BYPASS_LEN    1
#define HIDDRPHY_AC_STATIC_REG_DLYLINE_GATE_BYPASS_OFFSET 1
#define HIDDRPHY_AC_STATIC_REG_BYPCLK_GATED_BYPASS_LEN    1
#define HIDDRPHY_AC_STATIC_REG_BYPCLK_GATED_BYPASS_OFFSET 0

#endif // __HIDDRPHY_AC_STATIC_REG_REG_OFFSET_FIELD_H__
